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? 2016 microchip technology inc. ds20005451a-page 1 DN2530 features ? high-input impedance ? low-input capacitance ? fast switching speeds ? low on-resistance ? free from secondary breakdown ? low input and output leakage applications ? normally-on switches ? solid state relays ?converters ? linear amplifiers ? constant current sources ? power supply circuits ? telecom description the DN2530 is a low-threshold, depletion-mode, nor- mally-on transistor that utilizes an advanced vertical dmos structure and a well-proven silicon-gate manu- facturing process. this combination produces a device with the power-handling capabilities of bipolar transis- tors, plus the high-input impedance and positive-tem- perature coefficient inherent in metal-oxide semiconductor (mos) devices. characteristic of all mos structures, this device is free from thermal run- away and thermally-induced secondary breakdown. vertical dmos field-effect transistors (fets) are ide- ally suited to a wide range of switching and amplifying applications where high breakdown-voltage, high-input impedance, low-input capacitance, and fast switching speeds are desired. package types to-92 see table 2-1 for pin information to-243aa (sot-89) gate source drain gate source drain drain n-channel, depletion-mode, vertical dmos fet
DN2530 ds20005451a-page 2 ? 2016 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings ? drain-to-source voltage ........................................................................................................ ................................. bv dsx drain-to-gate voltage.......................................................................................................... ...................................bv dgx gate-to-source voltage......................................................................................................... ................................... 20v operating and storage temperature .............................................................................................. ............ -55 to 150 c note 1: all dc parameters are 100% tested at 25c unless other wise stated. pulse test: 300 s pulse, 2% duty cycle. 2: specification is obtained by characterization and is not 100% tested. ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect devi ce reliability. dc and ac characteristics electrical specifications: unless otherwise specified, for all specifications t a = +25c parameter symbol min typ max units conditions dc parameters ( note 1 , unless otherwise stated) drain-to-source breakdown voltage bv dsx 300 - - v v gs = -5.0v, i d = 100 a gate-to-source off voltage v gs(off) -1.0 - -3.5 v v ds = 25v, i d = 10 a v gs(off) change with temperature ? v gs(off) - - -4.5 mv/c v ds = 25v, i d = 10 a( note 2 ) gate body leakage current i gss - - 100 na v gs = 20v, v ds = 0v drain-to-source leakage current i d(off) --10av ds = max rating, v gs = -10v --1.0ma v ds = 0.8 max rating, v gs = -10v, t a = 125c ( note 2 ) saturated drain-to-source current i dss 200 - - ma v gs = 0v, v ds = 25v static drain-to-source on-state resistance r ds(on) --12 ? v gs = 0v, i d = 150 ma change in r ds(on) with temperature ? r ds(on) --1.1%/cv gs = 0v, i d = 150 ma( note 2 ) ac parameters ( note 2 ) forward transconductance g fs 300 - - mmho v ds = 10v, i d = 150 ma input capacitance c iss - - 300 pf v gs = -10v, v ds = 25v, f = 1 mhz common source output capacitance c oss --30 reverse transfer capacitance c rss --5 turn-on delay time t d(on) -- 10 ns v dd = 25v, i d = 150 ma, r gen = 25 ? , rise time t r --15 turn-off delay time t d(off) --15 fall time t f --20 diode parameters diode forward voltage drop v sd ??1.8v v gs = -10v, i sd = 150 ma ( note 1 ) reverse recovery time t rr ?600? nsv gs = -10v, i sd = 1.0a ( note 2 )
? 2016 microchip technology inc. ds20005451a-page 3 DN2530 note 1: i d continuous is limited by max rated t j 2: mounted on fr4 board, 25mm x 25mm x 1.57 mm 2.0 pin description the locations of the pins are listed in package types and packaging information . temperature specifications electrical specifications: unless otherwise specified, for all specifications t a =t j = +25c parameter symbol min typ max units conditions temperature ranges operating and storage temperature t a -55 ? 150 c package thermal resistances thermal resistance, to-92 ja ?132?c/w thermal resistance, to-243aa ja ?133?c/w thermal characteristics package i d ( 1 ) continuous (ma) i d pulsed (ma) power dissipation @t a = 25c (w) i dr ( 1 ) (ma) i drm (ma) to-92 175 500 0.74 175 500 to-243aa (sot-89) 200 500 1.6 ( 2 ) 200 500 table 2-1: pin description pin # to-92 pin # to-243aa function 21gate 32, 4drain 1 3 source
DN2530 ds20005451a-page 4 ? 2016 microchip technology inc. 3.0 functional description figure 3-1 shows the switching wa veform and test cir- cuit for DN2530. figure 3-2 and figure 3-3 provide typ- ical performance curves. figure 3-1: switching waveforms and test circuit 90% 10% 90% 90% 10% 10% pulse generator vdd r l output d.u.t. t (on) t d(on) t (off) t d(off) t r input input output 0v vdd r gen 0v -10v t f product summary bv dsx /bv dgx (v) r ds(on) (max) ( ? ) i dss (min) (ma) 300 12 200
? 2016 microchip technology inc. ds20005451a-page 5 DN2530 figure 3-2: typical performance curves output characteristics 1.0 0.8 0.6 0.4 0.2 0 0 50 100 150 200 250 v ds (volts) i d (amperes) transconductance vs. drain current i d (amperes) power dissipation vs. ambient temperature 0 25 50 75 100 125 150 to-92 to-243aa v gs = 1.0v 0.5v -0.5v -1.0v -1.5v 0v saturation characteristics 0.25 0.2 0.15 0.1 0.05 0 2.0 1.6 1.2 0.8 0.4 0 0 1 2 3 4 5 v gs = 1.0v -1.5v 0.5v 0v -0.5v -1.0v maximum rated safe operating area 1 10 100 1000 1 0.1 0.01 0.001 v ds (volts) i d (amperes) to-92 (pulsed) t c = 25c to-92 (dc) thermal response characteristics thermal resistance (normalized) 1.0 0.8 0.6 0.4 0.2 0 0.001 0.01 0.1 1.0 10 t p (seconds) to-243aa t a = 25c p d = 1.6w 0.5 0.4 0.3 0.2 0.1 0 0 0.05 0.1 0.15 0.2 0.25 v ds = 10v t a = -55c t a = 25c t a = 125c to-92 t c = 25c p d = 1.0w i d (amperes) v ds (volts) g fs (siemens) t a (c) p d (watts)
DN2530 ds20005451a-page 6 ? 2016 microchip technology inc. figure 3-3: typical performance curves (continued) bv dss variation with temperature bv dss (normalized) 1.10 1.05 1.00 0.95 0.90 0.85 -50 0 50 100 150 0 0.2 0.4 0.6 0.8 1.0 transfer characteristics t j (c) v gs (volts) v ds (volts) i d (amperes) 1.0 0.8 0.6 0.4 0.2 0 -2 -1 0 1 2 capacitance vs. drain-to-source voltage c (picofarads) 200 150 100 50 0 0 10 20 30 40 v gs = -5v i d = 100ma v gs = 0v v ds = 10v f = 1mhz v gs = -10v c oss c rss c iss t a = -55c 25c r ds(on) @ i d = 150ma v gs(off) @ 10ma v ds = 40v 125c on-resistance vs. drain current 50 40 30 20 10 0 i d (amps) q c (nanocoulombs) r ds(on) (ohms) 0 1 2 3 4 5 v gs(off) and r ds(on) variation with temperature 2.5 2 1.5 1 0.5 0 15 10 5 0 -5 t j (c) v gs(th) (normalized) gate drive dynamic characteristics v gs (volts) v ds = 20v 250pf 152pf -50 0 50 100 150
? 2016 microchip technology inc. ds20005451a-page 7 DN2530 4.0 packaging information 4.1 package marking information legend: xx...x product code or customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec ? designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or custom er-specific information. package may or not include the corporate logo. 3 e 3 e 3-lead to-243aa * (sot-89) example xxxxyww nnn dn5t513 343 3-lead to-92 ywwnnn xxxxxx xxxx e 3 example 513343 DN2530 n3 e 3
DN2530 ds20005451a-page 8 ? 2016 microchip technology inc. 3-lead to-243aa (sot-89) package outline (n8) symbol a b b1 c d d1 e e1 e e1 h l dimensions (mm) min 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00 ? 1.50 bsc 3.00 bsc 3.94 0.73 ? nom-------- -- max 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20 jedec registration to-243, variation aa, issue c, july 1986. ? this dimension differs from the jedec drawing drawings not to scale . b b1 d d1 e h e1 c a 12 3 e e1 top view side view l note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging.
? 2016 microchip technology inc. ds20005451a-page 9 DN2530 note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging.
DN2530 ds20005451a-page 10 ? 2016 microchip technology inc. appendix a: revision history revision a (january 2016) ? converted supertex doc #dsfp-DN2530 to microchip ds20005451a. ? removed 2000/reel option for to-92 package.
? 2016 microchip technology inc. ds20005451a-page 11 DN2530 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: DN2530 = n-channel, depletion-mode, vertical dmos fet package: n3 = to-92, 3-lead n8 = to-243aa (sot-89), 3-lead environmental g = lead (pb)-free/rohs-compliant package media type: (blank) = 1000/reel for n3 packages = 2000/reel for n8 packages examples: a) DN2530n3-g to-92 package, 1000/reel b) DN2530n8-g to-243aa package, 2000/reel part no. x device x environmental x x package options media - - type
ds20005451a-page 12 ? 2016 microchip technology inc. information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, dspic, flashflex, flexpwr, heldo, jukeblox, keeloq, keeloq logo, kleer, lancheck, link md, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of microc hip technology incorporated in the u.s.a. analog-for-the-digital age, any capacitor, anyin, anyout, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit serial programming, icsp, inter-chip connectivity, jitterblocker, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, puresilicon, righttouch logo, real ice, ripple blocker, serial quad i/o, sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered tradem arks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2016, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-5224-0250-3 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microper ipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem by dnv == iso/ts 16949 ==
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